A Low-Power, Small-Size 10-Bit Successive-Approximation ADC
نویسندگان
چکیده
A new Successive-Approximation ADC (Analog-toDigital Converter) was designed which not only consumes little power, but also requires a small chip area. To achieve those goals, both comparator and internal DAC (Digital-to-Analog Converter) have been improved. The ADC was designed in a 1.2 μm CMOS double-poly double-metal n-well process. It performs 10-bit conversion with 67 dB SFDR. Power consumption and die area are 0.6 mW and 0.95 mm2, respectively. ADC was extensively simulated using Hspice to verify the desired performance. key words: successive-approximation ADC, low power
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ورودعنوان ژورنال:
- IEICE Transactions
دوره 88-A شماره
صفحات -
تاریخ انتشار 2005